Axilica Limited - All Rights Reserved.

NEWS and PRESS RELEASES

AXILICA Limited releases version 1.2 of FalconML.

 

AXILICA announces the latest release of its product  ‘FalconML’. Release 1.2 includes a number of enhancements and new functionality designed to increase FalconML’s support for the development of advanced embedded systems and complex hardware.

 

• The new features include support for:
• Hardware/software co-design using the Altera Nios II CPU and Avalon interconnect;
• The FreeRTOS/OpenRTOS embedded OS, in addition to pre-existing support for POSIX;
• UML source-level debugging/profiling for generated hardware descriptions and SystemC; and SystemC TLM 2.

 

More...

 

 

AXILICA Limited demonstrates FalconML

at Embedded System Conference Automation Conference (ESC) 22nd - 23rd September 2009, Boston , USA.

 

 

AXILICA Limited exhibit its state-of-the-art behavioural synthesis product, ‘FalconML’, at the ESC Conference in Boston. FalconML enables the transformation of UML system-level descriptions, captured in standard UML modelling tools, into an RTL hardware description (VHDL, Verilog) ready for implementation on an FPGA or ASIC. FalconML also includes an option to generate SystemC for high-performance functional simulation.

  

More...

 

 

AXILICA Limited demonstrates FalconML

at Design Automation Conference (DAC) 7th – 14th June 2008, Anaheim, USA.

 

 

Innovative UML flow from AXILICA Limited exhibits at DAC’08. AXILICA Limited will exhibit ‘FalconML’, a state-of-the-art behavioural synthesis product for large-scale FPGA and ASIC system synthesis. This innovative flow starts from UML and results in a fully-scheduled and allocated, technology independent netlist ready for input to existing RTL flows. FalconML will be demonstrated at the Design Automation Conference www.dac.com from the 7th to the 13th June 2008, Anaheim, USA.

  

More...

 

 

AXILICA Limited demonstrates FalconML

at DATE conference on 10th – 14th March 2008, Munich, Germany.

 

 

AXILICA Limited demonstrates ‘FalconML’ a state of the art product for behavioral synthesis of hardware designs from UML that targets FPGAs or ASICs. FalconML  is a powerful new tool developed by Axilica to deliver behavioural synthesis of FPGA or ASIC-directed hardware designs from UML. AXILICA Limited demonstrates FalconML at DATE conference on 10th – 14th March 2008, Munich, Germany.

  

More ...