Axilica Limited - All Rights Reserved.

PRESS RELEASE

London, United Kingdom,  1st April 2010.

AXILICA

AXILICA Limited to exhibit at ESC Silicon Valley 2010; 26th -29th April 2010, San Jose, USA.

Axilica Limited will exhi

In addition to demonstrating the capabilities of FalconML, Axilica will be providing information on its participation in ENOSYS (intEgrated modelliNg and synthesis tOol flow for embedded SYStems design).  The ENOSYS project will focus on an integrated design flow including advanced system modelling, design space exploration and hardware/software synthesis of SoC systems.

Visit the Axilica stand at ESC Silicon Valley for further information on ENOSYS, its objectives and on the integrated design flow being developed under the project.

About AXILICA

AXILICA Limited is a private company with headquarters in Loughborough, United Kingdom. The company is shaping the future of systems development by providing advanced synthesis products supporting hardware-software co-design and rapid development of hardware (FPGAs and ASICs).

For further information on AXILICA or any of its products, please contact:

 AXILICA Limited

 Loughborough Innovation Centre

 Epinal Way,

 Loughborough,

 LE11 3EH,

 United Kingdom

 Email:     info@axilica.com

 Tel:        +44 (0)1509 227131

 Fax:       +44 (0)1509 276263

 Website: www.axilica.com

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Axilica will exhibit its model-driven UML-based behavioural synthesis product, FalconML, at ESC Silicon Valley. FalconML enables the of use of industry-standard SysML and UML modelling tools for the implementation of complex hardware devices, such as FPGAs and ASICs, within advanced embedded systems. FalconML synthesises UML models providing options for hardware-software co-design; for the generation of SystemC descriptions for fast system simulation; and for the generation of an RTL description in VHDL or Verilog for subsequent synthesis to a gate-level description.

ENOSYS is a project funded under the European Commission’s FP7 Program. Axilica will be enhancing FalconML to deliver the hardware system behavioral synthesis capabilities required in the ENOSYS integrated workbench.